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en:xu3_hardware_adc [2016/01/21 18:02]
john1117 [Register Map Summary]
en:xu3_hardware_adc [2016/01/21 18:18]
john1117 [Register Map Summary]
Line 136: Line 136:
  
 **ADC_CON2** **ADC_CON2**
 +
 +  * Base Address: 0x12D1_0000
 +  * Address = Base Address + 0x0004, Reset Value = 0x0000_0720
 +
 ^Name^Bit^Type^Description^Reset Value^ ^Name^Bit^Type^Description^Reset Value^
 |RSVD|[31:​11|R|Reserved(read as zero, do not modify)|0x0| |RSVD|[31:​11|R|Reserved(read as zero, do not modify)|0x0|
Line 149: Line 153:
 |RSVD|[7]|R|Reserved (read as zero, do not modify)|0x0| |RSVD|[7]|R|Reserved (read as zero, do not modify)|0x0|
 |C_TIME|[6:​4]|RW|Selection of the ADC conversion mode|0x2| |C_TIME|[6:​4]|RW|Selection of the ADC conversion mode|0x2|
-|:::​|:::​|:::​||:::​| +|:::​|:::​|:::​|0x0 = 1 times conversion to get the data|:::| 
-|:::​|:::​|:::​||:::​|+|:::​|:::​|:::​|0x1 = 2 times conversion|:::​| 
 +|:::​|:::​|:::​|0x2 = 4 times conversion|:::​| 
 +|:::​|:::​|:::​|0x3 = 8 times conversion|:::​| 
 +|:::​|:::​|:::​|0x4 = 16 times conversion|:::​| 
 +|:::​|:::​|:::​|0x5 = 32 times conversion|:::​| 
 +|:::​|:::​|:::​|0x6 = 64 times conversion|:::​| 
 +|:::​|:::​|:::​|NOTE:​ ADC_DAT register is updated on an average with a sum after 1, 2, 4, 8, 16, 32 or 64 times conversion.|:::​| 
 +|ACH_SEL|[3:​0]|RW|Analog input channel selection|0x0| 
 +|:::​|:::​|:::​|0x0 = Channel 0|:::| 
 +|:::​|:::​|:::​|0x1 = Channel 1|:::| 
 +|:::​|:::​|:::​|0x2 = Channel 2|:::| 
 +|:::​|:::​|:::​|0x3 = Channel 3|:::| 
 +|:::​|:::​|:::​|0x4 = Channel 4|:::| 
 +|:::​|:::​|:::​|0x5 = Channel 5|:::| 
 +|:::​|:::​|:::​|0x6 = Channel 6|:::| 
 +|:::​|:::​|:::​|0x7 = Channel 7|:::| 
 +|:::​|:::​|:::​|0x8 = Channel 8|:::| 
 +|:::​|:::​|:::​|0x9 = Channel 9|:::| 
 +|:::​|:::​|:::​|0xA to 0xF = Reserved|:::|
  
 **ADC_STATUS** **ADC_STATUS**
 +
 +  * Base Address: 0x12D1_0000
 +  * Address = Base Address + 0x00048, Reset Value = 0x0000_0000
 +
 ^Name^Bit^Type^Description^Reset Value^ ^Name^Bit^Type^Description^Reset Value^
 +|RSVD|[31:​3]|R|Reserved (read as zero, do not modify)|0x0|
 +|FLAG|[2]|R|End of conversion flag|-|
 +|:::​|:::​|:::​|0x0 = A/D conversion in process|:::​|
 +|:::​|:::​|:::​|0x1 = End of A/D conversion|:::​|
 +|RSVD|[1:​0]|R|Reserved (read as zero, do not modify)|0x0|
  
 **ADC_DAT** **ADC_DAT**
 +
 +  * Base Address: 0x12D1_0000
 +  * Address = Base Address + 0x000C, Reset Value = 0x0000_0000
 +
 ^Name^Bit^Type^Description^Reset Value^ ^Name^Bit^Type^Description^Reset Value^
 +|RSVD|[31:​12]|R|Reserved (read as zero, do not modify)|0x0|
 +|ADCDAT|[11:​0]|R|ADC conversion data value (0x000 to 0xFFF)|-|
  
 **ADC_INT_EN** **ADC_INT_EN**
 +
 +  * Base Address: 0x12D1_0000
 +  * Address = Base Address + 0x0010, Reset Value = 0x0000_0000
 +
 ^Name^Bit^Type^Description^Reset Value^ ^Name^Bit^Type^Description^Reset Value^
 +|RSVD|[31:​1]|R|Reserved (read as zero, do not modify)|0x0|
 +|INT_EN|[0]|RW|0x0 = Disables interrupt|0x0|
 +|:::​|:::​|:::​|0x1 = Enables interrupt|:::​|
  
 **ADC_INT_STATUS** **ADC_INT_STATUS**
 +
 +  * Base Address: 0x12D1_0000
 +  * Address = Base Address + 0x0014, Reset Value = 0x0000_0000
 +
 ^Name^Bit^Type^Description^Reset Value^ ^Name^Bit^Type^Description^Reset Value^
 +|RSVD|[31:​1]|R|Reserved (read as zero, do not modify)|0x0|
 +|INT_STATUS|[0]|RW|When Read|0x0|
 +|:::​|:::​|:::​|0x0 = Interrupt is not generated|:::​|
 +|:::​|:::​|:::​|0x1 = Interrupt is generated|:::​|
 +|:::​|:::​|:::​|When Write|:::|
 +|:::​|:::​|:::​|0x0 = No action|:::|
 +|:::​|:::​|:::​|0x1 = This bit is cleared|:::​|
 +
  
 **ADC_VERSION** **ADC_VERSION**
 +
 +  * Base Address: 0x12D1_0000
 +  * Address = Base Address + 0x0020, Reset Value = 0x8000_0008
 +
 ^Name^Bit^Type^Description^Reset Value^ ^Name^Bit^Type^Description^Reset Value^
 +|ADC_VERSION_INFO|[31:​0]|R|ADC Version Information|0x8000_0008|
en/xu3_hardware_adc.txt · Last modified: 2016/12/19 16:03 by charles.park
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