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en:xu3_hardware_adc [2016/01/21 17:50] john1117 [Using mmap] |
en:xu3_hardware_adc [2016/01/21 18:02] john1117 [Register Map Summary] |
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} | } | ||
</file> | </file> | ||
+ | ===== Register Map Summary ===== | ||
**Register Map Summary** | **Register Map Summary** | ||
+ | |||
+ | * Base Address : 0x12D1_0000 | ||
+ | |||
^Name^Offset^Description^Reset Value^ | ^Name^Offset^Description^Reset Value^ | ||
|ADC_CON1|0x0000|ADC Control register|0x0000_0002| | |ADC_CON1|0x0000|ADC Control register|0x0000_0002| | ||
Line 119: | Line 122: | ||
**ADC_CON1** | **ADC_CON1** | ||
+ | |||
+ | * Base Address : 0x12D1_0000 | ||
+ | * Address = Base Address + 0x0000, Reset Value = 0x0000_0002 | ||
+ | |||
+ | ^Name^Bit^Type^Description^Reset Value^ | ||
+ | |RSVD|[31:3]|R|Reserved(read as zero, do not modify)|0x0| | ||
+ | |SOFT_RESET|[2:1]|RW|Software Reset|0x1| | ||
+ | |:::|:::|:::|0x2 = Reset|:::| | ||
+ | |:::|:::|:::|Other = Non-reset|:::| | ||
+ | |STC_EN|[0]|RW|Enables ADC start conversion:|0x0| | ||
+ | |:::|:::|:::|0x0 = Disables|:::| | ||
+ | |:::|:::|:::|0x1 = Enables|:::| | ||
+ | |||
+ | **ADC_CON2** | ||
+ | ^Name^Bit^Type^Description^Reset Value^ | ||
+ | |RSVD|[31:11|R|Reserved(read as zero, do not modify)|0x0| | ||
+ | |OSEL|[10]|RW|Selection of the output format|0x1| | ||
+ | |:::|:::|:::|0x0 = 2's complement|:::| | ||
+ | |:::|:::|:::|0x1 = Offset binary(recommended)|:::| | ||
+ | |ESEL|[9]|RW|Selection of the ADC output timing|0x0| | ||
+ | |:::|:::|:::|0x0 = The first output data is evaluated after 40 ADC Clock|:::| | ||
+ | |:::|:::|:::|0x1 = The first output data is evaluated after 20 ADC Clock (recommended).|:::| | ||
+ | |HIGHF|[8]|RW|Selection of the ADC conversion rate|0x0| | ||
+ | |:::|:::|:::|0x0 = 30 KSPS conversion rate|:::| | ||
+ | |:::|:::|:::|0x1 = 600 KSPS conversion rate (recommended)|:::| | ||
+ | |RSVD|[7]|R|Reserved (read as zero, do not modify)|0x0| | ||
+ | |C_TIME|[6:4]|RW|Selection of the ADC conversion mode|0x2| | ||
+ | |:::|:::|:::||:::| | ||
+ | |:::|:::|:::||:::| | ||
+ | |||
+ | **ADC_STATUS** | ||
+ | ^Name^Bit^Type^Description^Reset Value^ | ||
+ | |||
+ | **ADC_DAT** | ||
+ | ^Name^Bit^Type^Description^Reset Value^ | ||
+ | |||
+ | **ADC_INT_EN** | ||
+ | ^Name^Bit^Type^Description^Reset Value^ | ||
+ | |||
+ | **ADC_INT_STATUS** | ||
+ | ^Name^Bit^Type^Description^Reset Value^ | ||
+ | |||
+ | **ADC_VERSION** | ||
^Name^Bit^Type^Description^Reset Value^ | ^Name^Bit^Type^Description^Reset Value^ |