Differences
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| Both sides previous revision Previous revision | Last revision Both sides next revision | ||
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en:xu3_hardware [2017/03/02 10:30] charles.park [Expansion Connectors] |
en:xu3_hardware [2017/04/25 14:54] luke.go [Expansion Connectors] CTS -> RTS |
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| ^ Pin Number ^ Net Name ^ GPIO & Export No ^ Default Pin State ^ Pin Number ^ Net Name ^ GPIO & Export No ^ Default Pin State ^ | ^ Pin Number ^ Net Name ^ GPIO & Export No ^ Default Pin State ^ Pin Number ^ Net Name ^ GPIO & Export No ^ Default Pin State ^ | ||
| | 1 | 5V0 | | | 2 | GND | | | | | 1 | 5V0 | | | 2 | GND | | | | ||
| - | | 3 | ADC_0.AIN0 | XADC0AIN_0 | I | 4 | UART_0.CTSN | GPA0.2 (#173) | I(PUDN) | | + | | 3 | ADC_0.AIN0 | XADC0AIN_0 | I | 4 | UART_0.RTSN | GPA0.2 (#173) | I(PUDN) | |
| | 5 | UART_0.RTSN | GPA0.3 (#174) | I(PUDN) | 6 | UART_0.RXD | GPA0.0 (#171) | I(PUDN) | | | 5 | UART_0.RTSN | GPA0.3 (#174) | I(PUDN) | 6 | UART_0.RXD | GPA0.0 (#171) | I(PUDN) | | ||
| | 7 | SPI_1.MOISI | GPA2.7 (#192) | I(PUDN) | 8 | UART_0.TXD | GPA0.1 (#172) | I(PUDN) | | | 7 | SPI_1.MOISI | GPA2.7 (#192) | I(PUDN) | 8 | UART_0.TXD | GPA0.1 (#172) | I(PUDN) | | ||
